Browse Prior Art Database

Data Processing System

IP.com Disclosure Number: IPCOM000098429D
Original Publication Date: 1960-Oct-01
Included in the Prior Art Database: 2005-Mar-07
Document File: 2 page(s) / 86K

Publishing Venue

IBM

Related People

Bowdle, RR: AUTHOR

Abstract

The control system permits concurrent use of a random access memory by a number of access mechanisms and their corresponding process units. The system is arranged to award priority to a given address on the basis of time, or, if two access mechanisms seek the same address simultaneously, on the basis of an established order of priority.

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Data Processing System

The control system permits concurrent use of a random access memory by a number of access mechanisms and their corresponding process units. The system is arranged to award priority to a given address on the basis of time, or, if two access mechanisms seek the same address simultaneously, on the basis of an established order of priority.

Each of four data processing units 10, 11, 12 and 13 sets up addresses in corresponding registers 14, 15, 16 and 17. These control access mechanisms 18, 19, 20 and 21 so that they are positioned at selected radial locations and adjacent selected disks 22 in a multiple disk memory 23.

A signal indicating that a track is available for a data transfer operation at a newly sought address is provided by the priority control circuits 24. The priority control circuits contain an interlock feature to prevent two or more process units from operating concurrently on any particular address and to award priority to selection units 10... 13 in cases of conflict.

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