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Pulse Storage Circuit

IP.com Disclosure Number: IPCOM000098477D
Original Publication Date: 1960-Nov-01
Included in the Prior Art Database: 2005-Mar-07
Document File: 2 page(s) / 37K

Publishing Venue

IBM

Related People

Carroll, WN: AUTHOR [+3]

Abstract

The transistorized electric charge storage circuit has an input circuit and an output circuit each of which has an asymmetrically conductive path. This circuit operates as a gate.

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Pulse Storage Circuit

The transistorized electric charge storage circuit has an input circuit and an output circuit each of which has an asymmetrically conductive path. This circuit operates as a gate.

Two PNP micro-alloy diffused junction transistors are connected in series. The emitter 10 of transistor 11 is grounded. Its base 12 connects to a pulse source at 13 and its collector 14 connects to emitter 15 of transistor 16. The collector 17 of 16 connects to primary 18 of pulse transformer 19. The second terminal 20 of 18 connects to a -10 volt source. The secondary 21 connects to output line 22. A load balancing resistor 23 is connected across 21 and its value is dependent on the type and magnitude of the load connected to 22.

The base 24 of 16 connects to an electrostatic storage circuit consisting of a capacitor 25. One terminal of 25 is grounded and the other connects to diode 26 which has its cathode connected to 27.

This circuit operates as a gate in the following manner. A negative pulse one volt in amplitude, applied at terminal 27 is passed by 26 to charge 25 approximately -1. 0 volt. The diode 26 has a high resistance in the reverse direction that tends to prevent the charge on 25 from leaking off towards 27. Also, as the input of 16 does not provide a conducting path for current, the charge remains on 25 for a sufficient period of time for use in logical pulse circuitry.

If, while 25 is charged, a pulse is applied to 13, transistor 11 is forwardly biased and permits current flow in its output circuit. This current flow establishes a conducting path for the...