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Gated Pulse Amplifier

IP.com Disclosure Number: IPCOM000098482D
Original Publication Date: 1960-Nov-01
Included in the Prior Art Database: 2005-Mar-07
Document File: 3 page(s) / 37K

Publishing Venue

IBM

Related People

Skerritt, JW: AUTHOR

Abstract

A pulse amplifying circuit is combined with a gating control circuit which presents a high impedance to incoming control levels. The two circuits are connected through uni-directional devices adapted to inhibit the operation of the amplifying circuit in the absence of a proper conditioning signal from the control circuit. This gating circuit may be operated at a pulse repetition frequency in excess of five megacycles per second.

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Gated Pulse Amplifier

A pulse amplifying circuit is combined with a gating control circuit which presents a high impedance to incoming control levels. The two circuits are connected through uni-directional devices adapted to inhibit the operation of the amplifying circuit in the absence of a proper conditioning signal from the control circuit. This gating circuit may be operated at a pulse repetition frequency in excess of five megacycles per second.

Pulse amplification is provided by transistor 10 which may be a PNP junction type having an emitter 11, a base 12 and a collector 13. Transistor 10 is connected in grounded emitter configuration such that a negative input signal applied to its base permits conduction in the output circuit consisting of emitter and collector. Upon conduction, the output signal is applied to the primary 14 of transformer 15. The polarity of the output pulse is inverted and passed to output
16.

A source of 3.0 volt in-out signals is connected to terminal 17. The pulses are coupled through a capacitor 18 to base 12. Capacitor 18 is clamped to ground through diodes 19 and 20. Resistor 21, connected between base 12 and a +9.5 volt source, provides a path for Ico of 10 to insure that it remains off in the absence of a pulse of proper polarity applied to 17.

Diode 23 connects to the junction 22 between capacitor 18 and base 12. This diode is poled such that conventional current flow is permitted toward the junction. When a signal of magnitude sufficient to reversely bias 23 is applied to its anode, a pulse at 17 drives base 12 negative, turning on 10 and producing an output pulse. If, however, 23 is not so reversely biased, base 12 does not drop sufficiently to produce an output pulse from 15.

The logical AND function is realized by the utilization of a plurality of diodes, each having its cathode connected to 22. In order for 10 to be turned on by an input pulse, all of the diodes so connected must be sufficiently reversel...