Browse Prior Art Database

Switching Circuit

IP.com Disclosure Number: IPCOM000098485D
Original Publication Date: 1960-Nov-01
Included in the Prior Art Database: 2005-Mar-07
Document File: 2 page(s) / 37K

Publishing Venue

IBM

Related People

Neff, GW: AUTHOR

Abstract

The switching circuits employ an electrostatic storage device in combination with an Esaki diode transistor latch circuit.

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Switching Circuit

The switching circuits employ an electrostatic storage device in combination with an Esaki diode transistor latch circuit.

Each diode E1, E2 and E3 is biased so that:

IS = +VS / (R1 + R2)

This bias provides bistable operation of each diode so that it may be in either the P stable state or Q stable state (lower drawing). The source VS provides a sequence of pulses as shown in the upper drawing. When +VS is turned on, each diode assumes the P stable operating state corresponding to the voltage VP.

When a current pulse IS is applied to lead 10 while VS is on, the diode E switches to the Q state and transistor T1 conducts, charging capacitor C1. When VS goes to zero, E1 is reset to the P state and T1 turns off. C1 discharges a current greater than 2 IS, switching E2 to the Q state, turning T2 on and charging C2. When VS again goes to zero, the second stage (E2, T2, C2) is reset and the third stage (E3, T3, C3) is operated.

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