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Magnetic Shift Registers

IP.com Disclosure Number: IPCOM000098587D
Original Publication Date: 1959-Apr-01
Included in the Prior Art Database: 2005-Mar-07
Document File: 2 page(s) / 37K

Publishing Venue

IBM

Related People

Butler, SA: AUTHOR

Abstract

Shift registers operable at high speed and having one multipath magnetic core K per bit are shown. Each core has four parallel legs 1, 2, 3 and 4 with a transfer loop embracing legs 3 and 4 of each core and leg 1 of the succeeding core in a series circuit including a capacitor C. A core is in the 0 state, when all the flux is in a counter-clockwise direction about the central aperture, and in a 1 state, when the flux is down in leg 1 and up in leg 2. In the upper figure, assuming that only K(2) is in the 1 state, when the B drive line is energized K(2) is reset to 0 providing a clockwise current in loop 2, which charges C(2) and switches leg 1 of K(3) upward, providing a counter-clockwise current in loop 3 to charge C(3). Loop 1 has no current, since leg 1 of K(2) has not been switched.

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Magnetic Shift Registers

Shift registers operable at high speed and having one multipath magnetic core K per bit are shown. Each core has four parallel legs 1, 2, 3 and 4 with a transfer loop embracing legs 3 and 4 of each core and leg 1 of the succeeding core in a series circuit including a capacitor C. A core is in the 0 state, when all the flux is in a counter-clockwise direction about the central aperture, and in a 1 state, when the flux is down in leg 1 and up in leg 2. In the upper figure, assuming that only K(2) is in the 1 state, when the B drive line is energized K(2) is reset to 0 providing a clockwise current in loop 2, which charges C(2) and switches leg 1 of K(3) upward, providing a counter-clockwise current in loop 3 to charge C(3). Loop 1 has no current, since leg 1 of K(2) has not been switched. When the rate of switching of K(2) starts decreasing, C(2) discharges providing a clockwise current in loop 2 to switch leg 1 of K(3) downward. Also, Also, C(3) discharges to provide a clockwise current in loop 3 tending to switch legs 3 and 4 of K(3) downward. The leg 3 of K(3) switches upward and leg 4 remains unchanged since the current of C(2) is greater than that of C(3) due to an energy loss when K(3) was initially switched therefore leaving K(3) in the 1 state.

The operation of the register in the lower drawing is very similar. Assuming that K(2) is reset to 0, a voltage is engendered across the winding on K(2), in the loop 2, which forces a current...