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Double Alloy Fabrication Techniques

IP.com Disclosure Number: IPCOM000098609D
Original Publication Date: 1959-Jun-01
Included in the Prior Art Database: 2005-Mar-07
Document File: 2 page(s) / 49K

Publishing Venue

IBM

Related People

Rutz, RF: AUTHOR

Abstract

A lower base resistance and more reliable collector breakdown results, when this technique for improving high frequency drift transistors is employed.

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Double Alloy Fabrication Techniques

A lower base resistance and more reliable collector breakdown results, when this technique for improving high frequency drift transistors is employed.

Often crystals are not 100% aligned in parallel orientation after cutting of wafers and processing up to the emitter alloying step. Thus,

the alloyed emitter is not parallel to the surface and, hence, not parallel to the diffused junction boundary of the collector P-N Junction.

If, before diffusing, an impurity dot such as Indium is alloyed and then the Indium rich ball is etched away, a perfectly true parallel surface is left as shown in Step 1.

The base is then diffused and the emitter alloyed as shown in Step 2.

The following advantages obtain: (a) emitter and collector junction are both perfectly parallel and, hence, closer spacing can be achieved, also more uniform flow of carriers from emitter to collector, (b) a larger crystal can be used since collector capacity contributed by outer region with high rho P type does not greatly increase that in the recrystallized P + region which can, however, be very small by making the first dot (In) very small.

A variation on the above method is to use very thin crystals (<=. 002 inches), alloy a pure Indium or lead dot all the way through, and then process as in Steps 3 and 4.

The procedure is as follows: 1. Alloy as in Step 3. 2. Etch away mounds. 3. Diffuse with As or Sb or other N impurity as in Step 4. 4. Lap off bottom half. 5. Se...