Browse Prior Art Database

Bit Error Checking and Matching

IP.com Disclosure Number: IPCOM000098667D
Original Publication Date: 1959-Aug-01
Included in the Prior Art Database: 2005-Mar-08
Document File: 2 page(s) / 64K

Publishing Venue

IBM

Related People

Saxenmeyer, GJ: AUTHOR

Abstract

The functions of digit comparison and validity checking, with the latter function having priority over the first, are combined then the circuit. Electrical signals, representing two decimal digits in two-out-of-five code, are applied concurrently and an error signal is developed if a bit is lost or gained in the representation of either digit. If no error signal is developed, a signal is developed at either the equal or unequal output terminal depending upon the relative value of the two digits. The development of an error signal prevents the generation of either an equal or unequal signal.

This text was extracted from a PDF file.
At least one non-text object (such as an image or picture) has been suppressed.
This is the abbreviated version, containing approximately 61% of the total text.

Page 1 of 2

Bit Error Checking and Matching

The functions of digit comparison and validity checking, with the latter function having priority over the first, are combined then the circuit. Electrical signals, representing two decimal digits in two-out-of-five code, are applied concurrently and an error signal is developed if a bit is lost or gained in the representation of either digit. If no error signal is developed, a signal is developed at either the equal or unequal output terminal depending upon the relative value of the two digits. The development of an error signal prevents the generation of either an equal or unequal signal.

To facilitate explanation of this circuit, it is assumed that a 1 is applied to the digit A input terminals by energizing bit lines 0A and 1A and that a 2 is applied to the digit B then put terminals by energizing bit lines 0B and 2B. Further, it is assumed that all cores have been magnetically saturated with the magnetic flux in the downward direction, by a reset pulse. Under these conditions, current flow through coils 10 through 25 generates magnetomotive forces in the direction indicated by the arrows adjacent to the coils. The magnetic states of cores 26, 27, 32 and 33 remain unchanged since the net magnetomotive force applied to each of these cores is substantially zero. Cores 29 and 30 also remain unchanged because the magnetomotive force applied to each is in the same direction as that produced by the previously applied reset pulse. The...