Browse Prior Art Database

Core Branching Circuit

IP.com Disclosure Number: IPCOM000098717D
Original Publication Date: 1959-Oct-01
Included in the Prior Art Database: 2005-Mar-08
Document File: 2 page(s) / 43K

Publishing Venue

IBM

Related People

Kauffmann, JA: AUTHOR

Abstract

The branching circuit is constructed wholly of magnetic cores and resistors and does not require any diodes. Through the use of four timed impulses, an input signal to a winding 2 is branched and is emitted coincidently from output windings 4 and 6.

This text was extracted from a PDF file.
At least one non-text object (such as an image or picture) has been suppressed.
This is the abbreviated version, containing approximately 53% of the total text.

Page 1 of 2

Core Branching Circuit

The branching circuit is constructed wholly of magnetic cores and resistors and does not require any diodes. Through the use of four timed impulses, an input signal to a winding 2 is branched and is emitted coincidently from output windings 4 and 6.

The circuit consists of coupling cores C(1), C(2), C(3), and C(4); storage cores S(1), S(2) and S(3); an inhibit core 1; pulse sources I(A), I(RA),I(RB); and a D.C. source I(DC). An input to winding 2 switches C(1) to a 1 state inducing a voltage in winding 8 which switches S(1) to a 1 state. The remaining circuitry reads the stored 1 from core S(1) and transfers this 1 through the core C(2) to different branch circuits to manifest an output signal on the windings 4 and 6.

Clock pulse I(A) writes a 1 in inhibit core 1 and biases S(3) toward a 1 state. The latter bias is cancelled by a D.C. counter bias in winding 18. 1 also reads a 1 from core S1..1n switching to the 0 state, S(1) induces a voltage in winding 10 and through winding 11 writes a 1 in C(2). C(2) in switching to the 1 state induces voltages in windings 12 and 14. The winding 12 links cores S(2) and C(3) but switches only S(2) to a 1 state due to a greater number of windings on S(2) Core I in switching to a 1 state induces a voltage in winding 16 which cancels the voltage induced in winding 14 by the switching of C(2) and prevents S(3) from being switched to a 1 state. Cores C(2), S(2) and I are in a 1 state at the end of the I(A) pulse.

Following the I(A) pulse, the clock pulse I(RA) switches C(2) to the 0 state but is ineffective as to S(1) which is already in the 0 state. In...