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Implementing The Connect Instruction

IP.com Disclosure Number: IPCOM000098760D
Original Publication Date: 1959-Dec-01
Included in the Prior Art Database: 2005-Mar-08
Document File: 2 page(s) / 36K

Publishing Venue

IBM

Related People

Doman, D: AUTHOR

Abstract

The object of the present apparatus is to modify data bits stored within each of flip flops 21, 22, etc., of first register 20 in accordance with data bits stored in it and in each of corresponding flip flops 11, 12, etc., of second register 10 and further in accordance with instructions in the form of signals applied to combinations of input conductors 1-4. A particular instruction on conductors 1-4 conditions particular ones of first matrix gates 5-8 to pass subsequently occurring clock pulses which appear sequentially on conductors IP1 and IP2.

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Implementing The Connect Instruction

The object of the present apparatus is to modify data bits stored within each of flip flops 21, 22, etc., of first register 20 in accordance with data bits stored in it and in each of corresponding flip flops 11, 12, etc., of second register 10 and further in accordance with instructions in the form of signals applied to combinations of input conductors 1-4. A particular instruction on conductors 1-4 conditions particular ones of first matrix gates 5-8 to pass subsequently occurring clock pulses which appear sequentially on conductors IP1 and IP2.

Each clock pulse also is passed through OR circuit 31 to complement and recomplement the register 10 flip flops after each clock pulse has passed through the matrix in the manner next explained. Pulses passed through selected ones of gates 5-8 are passed by OR circuits 9 and 10 to each of second matrices, such as gates 32, 34 and 36, which are individual to and conditioned by the outputs of the appropriate flip flop, such as 21, of register 20. The pulses passed by gates 32 and 34 are applied to third gate 36 of the second matrix, which is conditioned by the 1 side of flip flop 11 of register 10. Clock pulses passed by the second matrix are applied to the complement input of the appropriate first register flip flop, such as 21.

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