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A Current Operated Binary Counter Trigger

IP.com Disclosure Number: IPCOM000098851D
Original Publication Date: 1958-Jun-01
Included in the Prior Art Database: 2005-Mar-08
Document File: 2 page(s) / 32K

Publishing Venue

IBM

Related People

Bruce, GD: AUTHOR

Abstract

The circuit shown is a D. C. stable trigger in which steering is provided by an emitter R-C combination. The trigger will reverse its state by applying a D. C. current pulse simultaneously to the base of each of the two transistor sides of the circuit. This input pulse will momentarily drive both sides of the trigger heavily into conduction and both transistors will saturate. Because the on side emitter capacitor is fully charged to a negative voltage, the on collector will approach this negative voltage as both transistors are driven into saturation by the input pulse, while the collector of the off side will approach ground.

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A Current Operated Binary Counter Trigger

The circuit shown is a D. C. stable trigger in which steering is provided by an emitter R-C combination. The trigger will reverse its state by applying a D. C. current pulse simultaneously to the base of each of the two transistor sides of the circuit. This input pulse will momentarily drive both sides of the trigger heavily into conduction and both transistors will saturate. Because the on side emitter capacitor is fully charged to a negative voltage, the on collector will approach this negative voltage as both transistors are driven into saturation by the input pulse, while the collector of the off side will approach ground. Now as the input pulse subsides, the more positive voltage at the collector of the originally off transistor is reflected to the base of the originally on transistor through the usual RC cross coupling, tending to turn it off, while the more negative voltage at the collector of the originally on transistor is reflected to the base of the originally off transistor, tending to turn it on.

Since the emitter capacitors provide memory, and they are automatically charged and discharged, the magnitude of the input triggering charge delivered need not be limited by the recharging rate of the usual coupling capacitors. The trigger operation does not depend on a fast input leading edge or rise time. The input pulse is not critical. The capacitors in the emitter circuits compensate for minority carrier storage...