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Complementary Pulse Generator

IP.com Disclosure Number: IPCOM000098877D
Original Publication Date: 1958-Aug-01
Included in the Prior Art Database: 2005-Mar-08
Document File: 2 page(s) / 34K

Publishing Venue

IBM

Related People

Droege, FJ: AUTHOR [+2]

Abstract

The circuit includes inverter 13, cathode follower 14, AND circuit 15, inverter 16, cathode follower 17 and AND circuit 12. With inverter 13 conducting, cathode follower 14 will provide a low voltage output at 26 and, also, to AND circuit 15 to keep the output of AND circuit 15 low. This keeps inverter 16 cut off and provides a raised voltage output at 27 and, also, to AND circuit 12.

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Complementary Pulse Generator

The circuit includes inverter 13, cathode follower 14, AND circuit 15, inverter 16, cathode follower 17 and AND circuit 12. With inverter 13 conducting, cathode follower 14 will provide a low voltage output at 26 and, also, to AND circuit 15 to keep the output of AND circuit 15 low. This keeps inverter 16 cut off and provides a raised voltage output at 27 and, also, to AND circuit 12.

When a differentiated pulse appears at 18 caused by a pulse at input 10, inverter 13 is made nonconducting and cathode follower 14 is made conducting by the large voltage coupled across capacitor 20. The time constant of capacitor 11 and resistors 28 and 29 must be less than the time constant of the capacitors 20 and 21 and their associated resistors. Thus, the voltage coupled across the capacitor associated with the inverter going into nonconduction, e. g. 13, will not drop to the steady state voltage of the capacitor associated with the inverter which was nonconducting, e. g. 16. On the exponential rise of the differentiated pulse at 18, both inverters 13 and 16 will begin to conduct; but, cathode follower 17, coupled by capacitor 21 to inverter 16, which has a greater charge stored on it than capacitor 20, will reach a state of low conduction and apply a lowered potential to AND circuit 12 before cathode follower 14 can apply an equally lowered potential to AND circuit 15. Inverter 13 will thus be set to a state of nonconduction which will in turn ma...