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Exclusive OR Circuit

IP.com Disclosure Number: IPCOM000098888D
Original Publication Date: 1958-Aug-01
Included in the Prior Art Database: 2005-Mar-08
Document File: 2 page(s) / 34K

Publishing Venue

IBM

Related People

Skerritt, JW: AUTHOR

Abstract

An output of predetermined characteristics is realized with this circuit, when one and only one input possesses corresponding characteristics. The input terminals designated A and B are connected through diodes 1 and 2 to the base 3 of transistor 4. Inputs and outputs are either up at ground level or down at -3 volts. With both inputs up, the signal applied to base 3 turns transistor 4 off, and the resulting drop at collector 5 initiates current flow from the + 9. 5 volt terminal 6 through resistor 7, diode 8 and resistors 9, 10 to the -9.5 volt terminal 11. This current flow causes the potential at base 12 of transistor 13 to drop, and turns transistor 13 on. When both inputs are down, transistor 13 is turned on, diode 8 is back biased and current flows from terminal 6 through diode 15 to the input source B.

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Exclusive OR Circuit

An output of predetermined characteristics is realized with this circuit, when one and only one input possesses corresponding characteristics. The input terminals designated A and B are connected through diodes 1 and 2 to the base 3 of transistor 4. Inputs and outputs are either up at ground level or down at -3 volts. With both inputs up, the signal applied to base 3 turns transistor 4 off, and the resulting drop at collector 5 initiates current flow from the + 9. 5 volt terminal 6 through resistor 7, diode 8 and resistors 9, 10 to the -9.5 volt terminal 11.

This current flow causes the potential at base 12 of transistor 13 to drop, and turns transistor 13 on. When both inputs are down, transistor 13 is turned on, diode 8 is back biased and current flows from terminal 6 through diode 15 to the input source B. The current flow through diode 15 varies the potential at the base 12 to turn transistor 13 on. Under both situations where transistor 13 is turned on, the resulting output at collector 16 is up and applied through emitter follower circuit 17 to the output terminal 18. With either the A or B input up, the other down, the conduction through the input diodes 1 or 2 will turn transistor 4 on, diodes 8 and 15 are back biased, thereby cutting off transistor 13 and providing a down output at output terminal 18. Thus, a down output is provided at output terminal 18 only when either the A or B inputs are in the down state.

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