Browse Prior Art Database

# Decimal Complement Multiplying

IP.com Disclosure Number: IPCOM000098897D
Original Publication Date: 1958-Oct-01
Included in the Prior Art Database: 2005-Mar-08
Document File: 1 page(s) / 12K

IBM

## Related People

Hennis, RB: AUTHOR [+2]

## Abstract

In computers which use the over-and-over addition method of multiplication, the multiplicand is added into an accumulator a number of times equal to a multiplier digit in a multiplier register. Then, the next multiplier digit is transferred from a storage unit to the multiplier register and the entire multiplicand is shifted one column. Each time that the multiplicand is added to the accumulator, a 1 is subtracted from the multiplier digit until the number in the multiplier register is reduced to 0.

This text was extracted from a PDF file.
This is the abbreviated version, containing approximately 71% of the total text.

Page 1 of 1

Decimal Complement Multiplying

In computers which use the over-and-over addition method of multiplication, the multiplicand is added into an accumulator a number of times equal to a multiplier digit in a multiplier register. Then, the next multiplier digit is transferred from a storage unit to the multiplier register and the entire multiplicand is shifted one column. Each time that the multiplicand is added to the accumulator, a 1 is subtracted from the multiplier digit until the number in the multiplier register is reduced to 0.

Time is saved, when a particular multiplier digit is greater than 5, by utilizing a complement multiply operation. This requires multiplying of the multiplicand by 10 and over-and-over subtracting the multiplicand a number of times equal to the 10's complement of the multiplier. In certain machines it is advantageous to use a high order to low order shift of the multiplicand during multiplication. In these machines, in order to be able to accomplish complement multiply, the multiplier digit must be tested before the multiplicand is shifted down to perform the next over and over addition. If the next multiplier digit is 5 or less, the multiplicand is shifted down and the normal over and over addition takes place. If the multiplier digit is greater than 5, the multiplicand is added once into the accumulator without a shift, thereby effecting a (times 10) operation. Then, a shift takes place and the multiplicand is over and over subtracted...