Browse Prior Art Database

Technique For Evaporation Of High Resolution Circuits OR Lines

IP.com Disclosure Number: IPCOM000098955D
Original Publication Date: 1962-Mar-01
Included in the Prior Art Database: 2005-Mar-08
Document File: 2 page(s) / 35K

Publishing Venue

IBM

Related People

Seraphim, DP: AUTHOR [+2]

Abstract

(Image Omitted) This is a vacuum deposition method in which mask 1, determining the pattern of depositant 2 onto substrate 3, is incorporated as part of evaporant source 4 positioned within r-f coil 5.

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Technique For Evaporation Of High Resolution Circuits OR Lines

(Image Omitted)

This is a vacuum deposition method in which mask 1, determining the pattern of depositant 2 onto substrate 3, is incorporated as part of evaporant source 4 positioned within r-f coil 5.

Shield 8, having a plurality of pinholes 7, is interposed between evaporant source 4 and substrate 3. Evaporant, directed upwardly in diffused manner, passes through each pinhole 7. This focuses the evaporant such that patterns of depositant 2 are coincidently deposited onto substrate 3.

Continuous patterns are deposited by reducing the distance between pinholes 7. The fraction of evaporant through each pinhole 7 and collected on substrate 3 is determined by the size of the solid angle of the evaporant in relation to the size of pinhole. Pattern size of depositants 2 is a function of distances D and B and the pattern size of mask 1.

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