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Voltage Sense Scheme for Memory Performance Enhancement

IP.com Disclosure Number: IPCOM000099058D
Publication Date: 2005-Mar-10
Document File: 2 page(s) / 63K

Publishing Venue

The IP.com Prior Art Database

Abstract

Disclosed is a method for an alternative mechanism for system memory power delivery, using a voltage regulator (VR) on a motherboard, a memory card or module (plugged into a connector or socket), and a new voltage sensing/control scheme. Benefits include reducing costs and enhancing performances by removing the static voltage droop through board and connector.

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Voltage Sense Scheme for Memory Performance Enhancement

Disclosed is a method for an alternative mechanism for system memory power delivery, using a voltage regulator (VR) on a motherboard, a memory card or module (plugged into a connector or socket), and a new voltage sensing/control scheme. Benefits include reducing costs and enhancing performances by removing the static voltage droop through board and connector.

Background

Currently, voltage sense signals are located at the output of point-of-load VR. With the current state of the art DRAM devices may operate without a degraded supply, depending on the motherboard layout and module connector parameters. Also, the current approach is susceptible to parasitic concerns.

General Description

The disclosed method is an alternative mechanism for system memory power delivery, using a voltage regulator (VR) on a motherboard, a memory card or module (plugged into a connector or socket), and a new voltage sensing/control scheme. The voltage droop through the power delivery path (e.g. the base board through the connector) causes memory performance degradation or signal integrity issues. By sensing the voltage difference near or at DRAM balls, the voltage droop through base board and interconnection interface is compensated for or eliminated. This is achieved by adjusting the VR Up-Amp response to switch the VR switchers on or off, with information regarding the voltage level near the DRAM devices. Figure 1 shows the functionality of...