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Long Delay Envelope Test

IP.com Disclosure Number: IPCOM000099169D
Original Publication Date: 1990-Jan-01
Included in the Prior Art Database: 2005-Mar-14
Document File: 2 page(s) / 68K

Publishing Venue

IBM

Related People

Anderson, PM: AUTHOR [+2]

Abstract

Disclosed is a circuit used for detecting surface on magnetic recording media. This circuit delays sinusoidal test signal, derived from the recording head media, by several periods of the signal. By comparing delayed signal to the original signal, defects with low amplitude modulations with a specific rate of are detected.

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Long Delay Envelope Test

       Disclosed is a circuit used for detecting surface on
magnetic recording media.  This circuit delays sinusoidal test
signal, derived from the recording head media, by several periods of
the signal.  By comparing delayed signal to the original signal,
defects with low amplitude modulations with a specific rate of are
detected.

      Many surface analysis tests are based on writing a high onto
the disk and reading back the sinusoidal-type  Previous envelope
tests were designed to compare peaks separated by one-half of the
period of the wave.  One method of implementation accomplished by
delaying the original waveform by period on the sine wave and then
summing it to the waveform.  The output of the summation is normally
with any signal being the result of high frequency modulations.  If
this output exceeds a specified also known as the clip level, a
defect is

      The new long delay envelope test compares sinusoidal separated
by several periods of the sine wave.  This makes it possible to
detect lower frequency modulations and defects with a specific rate
of in the modulation.  In Fig. 1, comparison is achieved delaying a
sinusoidal signal 10 by N periods and summing delayed signal 20, to
the original signal.  In order to correctly, 2N must be an odd
number, and the harmonic of the original sinusoid must be preserved
through output of a power summer 30.  The output of power summer is
compared to a DC clip level 50 with...