Browse Prior Art Database

Multiple Processor Across the MICRO CHANNEL

IP.com Disclosure Number: IPCOM000099176D
Original Publication Date: 1990-Jan-01
Included in the Prior Art Database: 2005-Mar-14
Document File: 2 page(s) / 65K

Publishing Venue

IBM

Related People

Gatson, MS: AUTHOR [+3]

Abstract

This article describes the use in a personal system of a hardware register which may be read and to with a single MICRO CHANNEL* bus cycle, thereby synchronization and serialization of multiple bus

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 61% of the total text.

Multiple Processor Across the MICRO CHANNEL

       This article describes the use in a personal system of a
hardware register which may be read and to with a single MICRO
CHANNEL* bus cycle, thereby synchronization and serialization of
multiple bus

      When multiple processors are needed to operate in a system, the
management of the common controls for the being done by these
processors is typically done by a processor.  The scheme disclosed
herein allows this to be done by each processor in a MICRO CHANNEL
This is required to allow peer to peer to be efficient by not
requiring all requests for to flow through a single processor.  A
mechanism is whereby multiple processors can use a common data for
control functions, allowing any processor to update area, yet
insuring that integrity will be maintained multiple processors have
the requirement to update the data.

      The hardware register is in the attachment residing on MICRO
CHANNEL.  The specific characteristics of this are the following:
   Reading the register returns the contents and sets the
   contents to a predefined value.
   Writing the register resets the contents to a different
   predefined value.
   Reading (and setting the contents) or writing (and
   resetting the contents) of this register is an atomic
   operation, in that the complete operation will be
   completed within a single MICRO CHANNEL cycle.

      In one implementation, the register is a single byte the...