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Fault Tolerant Self Checking Checker for Multiple Independent Paths

IP.com Disclosure Number: IPCOM000099211D
Original Publication Date: 1990-Jan-01
Included in the Prior Art Database: 2005-Mar-14
Document File: 4 page(s) / 123K

Publishing Venue

IBM

Related People

Johnson, AM: AUTHOR

Abstract

Disclosed is a logic circuit for concurrently parity of multiple independent data paths that is self-checking in built-in self-test mode and and self-checking in operational mode. An is disclosed for the generation of any variation this checker circuit. This checker always yields two independent of the number of data paths or number of in each data path. This design functions properly even multiple paths simultaneously experience data errors.

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Fault Tolerant Self Checking Checker for Multiple Independent Paths

       Disclosed is a logic circuit for concurrently parity of
multiple independent data paths that is self-checking in built-in
self-test mode and and self-checking in operational mode.  An is
disclosed for the generation of any variation this checker circuit.
This checker always yields two independent of the number of data
paths or number of in each data path.  This design functions properly
even multiple paths simultaneously experience data errors.

      The fault-tolerant multiple path self-checking Parity checker
is well suited to the environment where data paths are likely to
exist.  This checker has following advantages over previous
implementations:
1  Fewer logic gates and connections are required.
2  It is fault-secure even in the presence of errors
   occurring simultaneously on multiple paths.
3  It is self-testing with the code-space inputs, which
   makes it totally self-checking when combined with the
   fault-secure capability.
4  The designer can choose both the level at which the
   combining of paths takes place and the configuration of
   inputs to that level.  This provides a degree of
   flexibility which can be beneficial for both testing
   and packaging.

      A design algorithm for generating a fault-tolerant path
self-checking parity checker for m independent assuming the use of a
single gate type to perform the XOR function, is the following:
1  Construct a parity tree for each independent data path.
   Each path will consist of a number of levels equal to
   logfni , where ni is the number of bits in the ith path
   and f is the number of inputs to the XOR function used.
2  Number of the levels from 0 to Li - 1, where Li =  logfni.
3  If the number of paths is even, then invert one bit at
   any level in the tree for a path above the combining
   level.
4  Select a combining level ki such that the number of
   levels remaining in each path is the same.
5  Let every path Pi at the input to level ki be divided into
   two input sets, Ai and Bi .  Thus, path Pi = the union
   of Aiand Bi .  Form a set C from all Ais and a set D
from    all Bis,
   where i = (1,...,m).
  

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 6.    Let i = (1,2,...m)
   and j - (1,2,...m) be a pair of indices corresponding
   to a path in the two trees, respectively.  Create M
   input sets for Cj and Dj by exchanging Aj terms and Bj
   terms f...