Browse Prior Art Database

Method to Minimize Junction Added by a Punch-Through Implant

IP.com Disclosure Number: IPCOM000099260D
Original Publication Date: 1990-Jan-01
Included in the Prior Art Database: 2005-Mar-14
Document File: 2 page(s) / 47K

Publishing Venue

IBM

Related People

Bhattacharyya, A: AUTHOR [+3]

Abstract

A temporary selective tungsten ion block is used restrict the halo implant to gate edges only, thus junction capacitance added.

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Method to Minimize Junction Added by a Punch-Through Implant

       A temporary selective tungsten ion block is used restrict
the halo implant to gate edges only, thus junction capacitance added.

      Referring to Fig. 1, standard processing is used to form  gate
electrode 2 which has a cap oxide 4 and is over gate dielectric 6 on
silicon substrate 8.  A oxide layer 10 is then conformally deposited,
and nitride spacers 12 are formed by conformal of the nitride,
followed by anisotropic etching remove nitride from horizontal
surfaces.  After etching the nitride 12, exposed oxide 10 is removed
by anisotropic etching, leaving the structure shown cross section in
Fig. 1.

      To form the structure shown in Fig. 2, spacers 12 are etched
away and tungsten 14 is selectively on all exposed silicon by
chemical vapor (CVD).  Ion implantation is then done for halo lightly
doped drain (LDD) regions.

      After the ion implantation process, tungsten 14 is etched off
and oxide sidewall spacers 16 are as shown in Fig. 3.  Source and
drain implantation then performed and a drive-in heat treatment forms
doping as main source region 18 with an LDD region 20 halo region 22.
 Similarly, main drain region 24 is with LDD region 26 and halo
region 28 on the left side Fig. 3.