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Process of Depositing Thermally Tungsten Onto Silicon for Low Semiconductors

IP.com Disclosure Number: IPCOM000099266D
Original Publication Date: 1990-Jan-01
Included in the Prior Art Database: 2005-Mar-14
Document File: 2 page(s) / 59K

Publishing Venue

IBM

Related People

Hunt, D: AUTHOR [+2]

Abstract

A technique is described whereby thermally stable is deposited onto silicon, by means of a disilane so as to increase productivity and to produce with low resistivity. The process differs processes which used sputtered or evaporated tungsten, that utilizing a disilane process provides a means of the deposition, by means of a liquid form at temperatures.

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Process of Depositing Thermally Tungsten Onto Silicon for Low Semiconductors

       A technique is described whereby thermally stable is
deposited onto silicon, by means of a disilane so as to increase
productivity and to produce with low resistivity.  The process
differs processes which used sputtered or evaporated tungsten, that
utilizing a disilane process provides a means of the deposition, by
means of a liquid form at temperatures.

      Tungsten (W) is widely used in the production of VLSI
Typically, W is deposited onto doped whereby the reaction between the
two elements drive-in temperatures is very sporadic. This results in
conversion of W to WSi2  with an increase in the and delamination,
wherever oxygen occurs at the The process described herein
demonstrates how to the problems, primarily through the use of
disilane.

      First disilane, at 300-500 sccm, and WF6  at 10-15 sccm, passed
over the substrate for 40 to 60 seconds, so as to 200-300 o of WSix
at 400oC.  Then H2, at 1500-2500 is mixed with these gases, chemical
vapor deposit of tungsten of the desired thickness, by reducing the
of disilane to 50-100 sccm.  The dissociation of SiH6 Si would be
easy at 400oC and Si and H2 in turn would WF6 to CVD W.  The
predeposited WSix  rich in Si prevents any reaction of W with the
silicon  The resistivity of CVD W deposit will be  Fig. 1 illustrates
the process flow as a of time.  Fig. 2 shows a resulting bipolar
stack

      For MOS applic...