Browse Prior Art Database

Supercomputer System Data Mechanism

IP.com Disclosure Number: IPCOM000099324D
Original Publication Date: 1990-Jan-01
Included in the Prior Art Database: 2005-Mar-14
Document File: 2 page(s) / 87K

Publishing Venue

IBM

Related People

Hattersley, JR: AUTHOR [+3]

Abstract

In a supercomputer system, a Central Processor is commonly designed so that a separate scalar and vector processor execute their corresponding from the same instruction stream. However, for reasons, it is often desirable for the processor to reference its data out of a data cache, the vector processor fetches and stores its data from and to main storage.

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Supercomputer System Data Mechanism

       In a supercomputer system, a Central Processor is commonly
designed so that a separate scalar and vector processor execute their
corresponding from the same instruction stream.  However, for
reasons, it is often desirable for the processor to reference its
data out of a data cache, the vector processor fetches and stores its
data from and to main storage.

      When this data storage arrangement is used, it is to guarantee
data coherency between the scalar and processor; i.e., a
cross-interrogation (XI) mechanism be provided to ensure that the
scalar processor will reference back-level data when the vector
processor into a location that also currently resides in the cache.
Two solutions to this problem are:

      1.   Route the vector store requests to the scalar cache search
its contents for the location where data is to be stored; and if the
data store resides in the cache, invalidate that entry.  In order to
implement this solution degrading the performance of the directory, a
complex directory design is required to handle one more simultaneous
vector requests along with any request each machine cycle.

      2.   Implement a "shadow" cache directory in the vector  The
shadow directory is an exact copy of scalar directory.  It is updated
by the scalar only when its directory contents change on a miss.  The
vector processor then searches the directory on vector stores; and
when it finds a that matches the location of the stored data,
generates an invalidation request for that location the scalar
processor's directory.  Although this removes most of the additional
complexity in Solution 1 it still requires expensive full of the
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