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Open Cable Detector Used With a Differential Driver

IP.com Disclosure Number: IPCOM000099341D
Original Publication Date: 1990-Jan-01
Included in the Prior Art Database: 2005-Mar-14
Document File: 2 page(s) / 68K

Publishing Venue

IBM

Related People

Erdelyi, CK: AUTHOR [+2]

Abstract

A circuit is added for system fault diagnostics which recognizes a broken output connection of a differential driver and permits system shut down to prevent loss of data. The circuit detects whether there is current flowing out of either the true or the complement half of the driver.

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 57% of the total text.

Open Cable Detector Used With a Differential Driver

       A circuit is added for system fault diagnostics which
recognizes a broken output connection of a differential driver and
permits system shut down to prevent loss of data. The circuit detects
whether there is current flowing out of either the true or the
complement half of the driver.

      The figure shows how the differential driver is connected in a
system.  The true half of the driver is comprised of transistors T1
and T2, and the complement half of the driver is comprised of
transistors T3 and T4. Current flows from one half of the driver to
the other under normal conditions.  If an open occurs in the output
network, current flows only when the driver is switched and then only
until the capacitance C2 and/or C4 is charged or discharged. The
circuit works by detecting whether current is flowing out of either
half of the driver.

      For example, when True output at pad 10 switches high, current
flows through devices T5 and T6, causing a voltage drop across them.
If the output network is properly connected, current continues to
flow until the output switches again.  If there is an open in the
output network, current will only flow through devices T5 and T6
until capacitor C2 is charged.  Then, device T5 pulls node N1 up to
supply voltage VDD.  Amplifier 14 brings the signal on node N1 to a
level appropriate to complementary metal oxide silicon (CMOS)
circuitry.  If there is an open in the out...