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Browse Prior Art Database

Dynamic Bus Transfer Algorithm

IP.com Disclosure Number: IPCOM000099367D
Original Publication Date: 1990-Jan-01
Included in the Prior Art Database: 2005-Mar-14
Document File: 1 page(s) / 40K

Publishing Venue

IBM

Related People

Arimilli, R: AUTHOR [+3]

Abstract

Transfers between a Bus Master and a Slave on the MICRO CHANNEL* bus are architected to be aligned with address, generated by the master, and the width of the slave (1, 2 or 4 bytes). The master on the MICRO CHANNEL may be required to transfer a large number of bytes. The data may be unaligned with respect to address and the slave width. Thus the master is required to align the data and transfer it in multiple cycles for the MICRO CHANNEL. This Dynamic Bus Transfer Algorithm defines a general algorithm used in the RIOS system that dynamically determines the maximum data to be transferred during a MICRO CHANNEL bus cycle.

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 78% of the total text.

Dynamic Bus Transfer Algorithm

       Transfers between a Bus Master and a Slave on the MICRO
CHANNEL* bus are architected to be aligned with address, generated by
the master, and the width of the slave (1, 2 or 4 bytes).  The master
on the MICRO CHANNEL may be required to transfer a large number of
bytes.  The data may be unaligned with respect to address and the
slave width.  Thus the master is required to align the data and
transfer it in multiple cycles for the MICRO CHANNEL.  This Dynamic
Bus Transfer Algorithm defines a general algorithm used in the RIOS
system that dynamically determines the maximum data to be transferred
during a MICRO CHANNEL bus cycle.

      Source width is defined as the maximum number of bytes that can
be transferred in a single cycle on the MICRO CHANNEL.  Let LSTBA be
the Least Significant Two Bits of the Address, TL be the Transfer
Length in bytes, MW be the Width of the Master (2 or 4) and X
be "don't care".  The Source Width algorithm is:
    if (LSTBA = 00) and (TL >= 4) and MW = 4
    then Source Width = 4;
    else if (LSTBA = X1) or (TL = 1) or (MW = 1)
    then Source Width = 1;
    else Source Width = 2;
    end if;
    end if;
    Cycle Width is defined as the actual number of bytes that will be
transferred in the current cycle between a master and a slave on the
MICRO CHANNEL.  Let DW be the Width of the Slave (1, 2 or 4).  The
Cycle Width algorithm is:
    if (Source Width = 4) and (DW =...