Browse Prior Art Database

Method of Scanning a Large Number of External Signals

IP.com Disclosure Number: IPCOM000099444D
Original Publication Date: 1990-Jan-01
Included in the Prior Art Database: 2005-Mar-14
Document File: 2 page(s) / 90K

Publishing Venue

IBM

Related People

Bravo, MA: AUTHOR [+2]

Abstract

A technique is described whereby scanning of a large number of external input/output (I/O) signals is accomplished with significantly fewer module I/O signal pins than used in prior art. A signal scanning matrix is used, consisting of open drain drivers, receivers and termination resistors, and controlled by an algorithm to provide the required scanning of signals, but requires fewer I/O signal pins.

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Method of Scanning a Large Number of External Signals

       A technique is described whereby scanning of a large
number of external input/output (I/O) signals is accomplished with
significantly fewer module I/O signal pins than used in prior art.  A
signal scanning matrix is used, consisting of open drain drivers,
receivers and termination resistors, and controlled by an algorithm
to provide the required scanning of signals, but requires fewer I/O
signal pins.

      Typically, very large-scale integrated (VLSI) modules require a
large number of signals to be sampled when used in high I/O intensive
applications, such as are used in communication/computer subsystems.
As VLSI technology logic density increases, the span of applications
also expands, thereby requiring more and more I/O signal pins on
circuit modules.

      Smart I/O processor communications subsystems are increasingly
being used to perform higher levels of system applications, such as
communications protocol code processing, which were traditionally
performed by the system processor.  Generally, the applications are
I/O intensive, requiring a high level of low-cost sensitivity
communications subsystems.  They, in turn, are required to drive
large numbers of communications ports, where each port contains
numerous communication lines which must be monitored.  This
translates into communication adapter module logic that requires a
very high number of I/O pins dedicated to sensing and monitoring
multiple ports and communication cable identification bits.  The
concept described herein permits the I/O pin usage to be minimized by
utilizing a signal scanning matrix, controlled by an algorithm, in
concert with module open drain drivers, receivers and termination
resistors, so as to reduce the number of pins.

      Cable identification bits, as used in communications protocol,
are physically sensed at the cable connector pins and are not
terminated or tied to ground at a connector. The pins connect to a
communications adapter where the signals are tied at plus voltage and
routed to module I/O pin inputs for sensing by the sof...