Browse Prior Art Database

Pseudo Random Extended Forward Reverse Counter

IP.com Disclosure Number: IPCOM000099468D
Original Publication Date: 1990-Jan-01
Included in the Prior Art Database: 2005-Mar-14
Document File: 2 page(s) / 78K

Publishing Venue

IBM

Related People

Bedford, JS: AUTHOR [+4]

Abstract

Disclosed is a technology independent Level-Sensitive Scan Design (LSSD) device designed for self-test applications, such as an array address stepper or a pseudo random pattern generator.

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 52% of the total text.

Pseudo Random Extended Forward Reverse Counter

       Disclosed is a technology independent Level-Sensitive Scan
Design (LSSD) device designed for self-test applications, such as an
array address stepper or a pseudo random pattern generator.

      The Pseudo Random Extended Forward Reverse (PREFR) counter was
originally designed to operate in an array self-test environment as
an address stepper.  In current pseudo random array testing methods,
faults can be masked over when using an address sequence that cannot
be applied in its reverse order.  The PREFR counter provides the
capability of generating an address sequence and then repeating it in
either the same or reverse order by either shifting bits right or
left, thus unmasking array faults.

      The counter can be configured for any number of bits and can
count through its full range, including zero, without intervention.
The all zeros count is mandatory in array test applications, and in
the past required additional effort to establish.  The starting
output bit configuration (seed), the direction of progression, and
the poloynomial tap positions are all controlled by the user.

      When used as a Pseudo Random Pattern Generator (PRPG) in
testing LSSD logic, the counter also reduces linear dependencies that
would be propagated into the logic from the counter.  The forward
count establishes a set of linear dependencies, the reverse count
establishes an entirely different set of linear dependencies (as
viewed form the logic under test).  The effects of these two e...