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Modeling the Effect of Leakage Inductance in Switching Converter Power Processors

IP.com Disclosure Number: IPCOM000099542D
Original Publication Date: 1990-Feb-01
Included in the Prior Art Database: 2005-Mar-15
Document File: 3 page(s) / 93K

Publishing Venue

IBM

Related People

Kelkar, S: AUTHOR

Abstract

An effective technique for the simulation of switching converter power processors has been disclosed earlier [*] using analog models for the switching portions of the circuit. A technique that permits the modeling of leakage inductance effects is disclosed; this model can be used along with the analog models to improve simulation accuracy. The leakage inductance can have important effects on performance especially during transient response and under high line, max load conditions. The key contribution in this disclosure is a general technique that permits easy and accurate modeling of the effects of leakage inductance.

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Modeling the Effect of Leakage Inductance in Switching Converter Power Processors

       An effective technique for the simulation of switching
converter power processors has been disclosed earlier [*] using
analog models for the switching portions of the circuit.  A technique
that permits the modeling of leakage inductance effects is disclosed;
this model can be used along with the analog models to improve
simulation accuracy. The leakage inductance can have important
effects on performance especially during transient response and under
high line, max load conditions.  The key contribution in this
disclosure is a general technique that permits easy and accurate
modeling of the effects of leakage inductance.

      Fig. 1 shows the power stage of a typical full bridge topology
power processor.  The power transformer leakage inductance is
represented by the two inductances Ll in series with the output
diodes.  It is to be noted that Ll could also represent the sum of
the leakage and the snubber inductance, if one is used.  The switches
in the power stage are turned on in sequence, and before the switch
is on, the voltage V' is zero and the diodes are each carrying half
the total load current.  It is assumed that the output inductor L is
large so that the current through it stays constant and equal to the
load current lload.  When the power stage switches are turned on, the
voltage V' increases to a value determined by the supply voltage and
the power transformer turns ratio.  With the polarity of V', as
shown, the diode at the bottom will turn off and the top diode will
then carry all of the load current lload.  The effect of the leakage
inductance Ll is to delay the transfer of current from the bottom
diode to the one at the top.  The transfer of current is symmetrical
with the bottom diode turning off every other cycle, while the top
diode turns off every cycle.  It is only necessary to model the
effect of one transfer due to the symmetry of the circuit action.

      Delay in the transfer of current results in the voltage V1 at
the inductor being phase delayed, as shown in Fig. 2. The amount of
dela...