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Browse Prior Art Database

Pixel Map Wrapping In A Hardware Graphics Device

IP.com Disclosure Number: IPCOM000099556D
Original Publication Date: 1990-Feb-01
Included in the Prior Art Database: 2005-Mar-15
Document File: 5 page(s) / 234K

Publishing Venue

IBM

Related People

Bowater, RJ: AUTHOR [+3]

Abstract

This article describes a method of executing tiled operations of any size with a hardware graphics processor in order to draw repeating colors and patterns on a display monitor. The method increases the performance of tiled (Image Omitted) graphics operations, reduces the amount of memory required and simplifies the system software required to execute it.

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 27% of the total text.

Pixel Map Wrapping In A Hardware Graphics Device

       This article describes a method of executing tiled
operations of any size with a hardware graphics processor in order to
draw repeating colors and patterns on a display monitor.  The method
increases the performance of tiled

                            (Image Omitted)

 graphics operations, reduces
the amount of memory required and simplifies the system software
required to execute it.

      Graphics Systems fall into two general categories: those in
which all graphics operations are performed by software running on a
general- purpose processor (a "software" graphics system), and those
in which some dedicated hardware is used to perform primitive
graphics operations on behalf of the system processor (a "hardware"
graphics system).  It is to the latter that this method applies.

      The background and terminology of Graphics Systems are provided
below in the Typical Graphics System section. Previous methods of
tiling using Software are described in Software Graphics Systems, and
previous methods of tiling using Hardware are described under
Hardware Graphics Systems.

      Automatic Pixel Map Wrapping is a method of executing tiled
operations of any size by a hardware graphics processor.  Internally,
the processor holds map X,Y pointers and the width and height of the
pixel maps in registers.  A number of pixels can be processed in one
cycle of the processor.  At the end of one cycle, addresses and
conditions relating to the next cycle are computed. Circuitry is
provided to detect whether the next cycle will cause either the X
pointer to become less than 0 or greater than the (map width-1), or
the Y pointer less than 0 or greater than the (map height-1).  If
either or both of the above conditions is true, the co-processor
hardware will automatically wrap the relevant pointer or pointers to
the opposite boundary.  The wrapping function is performed on both
the X and Y pointers.  The next processor cycle will then proceed as
normal. Hardware Wrapping on PxBlts

      The automatic wrapping of X and Y pointers by hardware performs
automatic tiling of the Source map over the Destination rectangle for
PxBlt operations.  In order to perform a tiled PxBlt, the system
software should write the data for one instance only of the tile into
memory.  It should then set up the graphics processor hardware
registers to point the Source pixel map start address at the data,
define the map width as the width of the tile, and define the map
height as the height of the tile.  Finally, system software initiates
the hardware processor operation which will automatically cause the
hardware processor to execute the tiled PxBlt operation without any
further action required from system software.  The tile need not be
aligned over the PxBlt rectangle, but may be placed in any position
relative to the Destination.  This is determined by the starting
Sour...