Browse Prior Art Database

Extended Error Correction Scheme for a Reed-Solomon Package Error Correction Code

IP.com Disclosure Number: IPCOM000099576D
Original Publication Date: 1990-Feb-01
Included in the Prior Art Database: 2005-Mar-15
Document File: 6 page(s) / 236K

Publishing Venue

IBM

Related People

Glaise, RJ: AUTHOR

Abstract

A modified Reed-Solomon code is used to extend the correction of a Single Package Correction/Double Package Detection (SPC/DPD) code normally capable of correcting any number of errors in one sub-field of a code word or package and detecting any number of errors in two packages. When the initial decoding of the data indicates an uncorrected error a post-processing determines the position of at least one of the failing packages. Then the second one is found immediately by a simple decode of the initial syndrome.

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 32% of the total text.

Extended Error Correction Scheme for a Reed-Solomon Package Error Correction Code

       A modified Reed-Solomon code is used to extend the
correction of a Single Package Correction/Double Package Detection
(SPC/DPD) code normally capable of correcting any number of errors in
one sub-field of a code word or package and detecting any number of
errors in two packages.  When the initial decoding of the data
indicates an uncorrected error a post-processing determines the
position of at least one of the failing packages.  Then the second
one is found immediately by a simple decode of the initial syndrome.

      ECC (Error Correcting Code or Circuitry) is implemented for a
memory to cope with the solid "HARD" errors that are permitted to
accumulate over the life of the machine.  This is the means by which
ECC makes the memory much more reliable.  However, in the dense
dynamic memory modules used to build the main store of processors,
intermittent or "SOFT" errors occur.  When a "SOFT" error aligns with
a "HARD" one, which is likely to happen more frequently in a memory
that has been in operation for a long time, an uncorrected error is
detected that demands a re-IPL of the machine.

      Memories were formerly organized in a 1-bit-per-package manner,
and ECC was generally a Single Error Correction/Double Error
Detection ECC based on a HAMMING code.  With such codes a procedure
called "Invert and Retry" or "Complement Recomplement" allows
management of the above situation in which "HARD" and "SOFT" errors
are aligned. The word is re-written after it has been inverted.  A
subsequent read is done and the inverted Data is passed through the
ECC that is now capable of correcting the "SOFT" error while the
"HARD" one is masked.  This procedure extends the correcting
capability of the code to 2 bits in error.  However, it does not work
when we consider the more recent b-bit-per-chip organized memory.  On
the contrary of what happens with a one bit per chip organization,
the inversion cannot insure that all hard errors can be masked in one
package, thus allowing correction of the soft (or hard) error(s) in a
second package.

      Although b=3 does not likely fit a real memory organization
(most of the memory modules are now organized by 4 bits), all
examples are illustrated with this value of b for the sake of
simplicity since the number of elements of the Galois Field on which
is based the code is then only 8. The standard H matrix for this
value of b is shown in Fig. 1.

      The second element of the field is obtained by multiplying T1
by T1 such that T1 x T1, etc.  Only eight different symbols can be
found with b=3 that includes the null matrix 0 and the identity
matrix T0 .  An addition and a multiplication operation (modulo 7)
are defined on this Galois field.  Both operations are commutative.
The addition table is shown hereafter.  The following modified
Reed-Solomon matrix is, however, preferred, as shown in...