Browse Prior Art Database

Pre-Flll/Pre-Empty Thresholds Improve Bus Efficiency

IP.com Disclosure Number: IPCOM000099585D
Original Publication Date: 1990-Feb-01
Included in the Prior Art Database: 2005-Mar-15
Document File: 2 page(s) / 56K

Publishing Venue

IBM

Related People

Keener, DS: AUTHOR [+3]

Abstract

This article describes a technique for use in a person- al computer (PC) system which reduces bus dead time associated with arbitration.

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 59% of the total text.

Pre-Flll/Pre-Empty Thresholds Improve Bus Efficiency

       This article describes a technique for use in a person-
al computer (PC) system which reduces bus dead time associated with
arbitration.

      Transfers on a typical PC system utilizing a bus, such as MICRO
CHANNEL*, generated by an attachment card take 240 ns to complete.
The arbitration time required to gain ownership of the bus can take
600 ns.  To require an arbitration cycle for each transfer would
cause more time to be spent on arbitration than on the actual data
transfer. The resultant bus efficiency would be:
                   240 ns
                   over            equals  29%
             600 ns   +   240 ns

      Ideally, an attachment card should arbitrate for bus ownership,
then do a number of transfers back to back. To increase the
efficiency of the attachment card.  A first-in, first-out (FIFO) is
implemented with output signals to denote pre- full and pre-empty.
Pre-full indicates that there is one empty position (32 bits) left in
the FIFO; pre-empty indicates that there is one full position.  This
is illustrated in the drawing which shows the FIFO thresholds.

      This disclosure defines a threshold for FIFO operation. If the
attachment card is transferring data to the system, it will wait
until the FIFO is almost full (pre-full) before it requests ownership
of the bus.  This assures that at least 28 bytes a...