Browse Prior Art Database

Pattern Detection Method

IP.com Disclosure Number: IPCOM000099590D
Original Publication Date: 1990-Feb-01
Included in the Prior Art Database: 2005-Mar-15
Document File: 2 page(s) / 73K

Publishing Venue

IBM

Related People

Johnson, DWJ: AUTHOR

Abstract

Disclosed is a method for detecting a number of distinct bit patterns om a serial data stream. The total logic required was reduced through using common logic and generating a minimum amount of additional logic for additional patterns. A byproduct of this method is the flexibility and ease of adding new patterns. The innovative changes to design were the additions of counters and shift registers to a sequential state machine design.

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Pattern Detection Method

       Disclosed is a method for detecting a number of distinct
bit patterns om a serial data stream.  The total logic required was
reduced through using common logic and generating a minimum amount of
additional logic for additional patterns. A byproduct of this method
is the flexibility and ease of adding new patterns.  The innovative
changes to design were the additions of counters and shift registers
to a sequential state machine design.

      A sequential state machine stores information about the history
of the data stream.  This consists of information such as whether a
repeating pattern exists, how long this pattern is, whether the bits
are alternating or similar.  A single counter is used to indicate how
long a pattern is repeating, whether all ones, zeros, or alternating
bits. The state machine stores whether the bit stream is alternating
in order to decode the counter.  It also stores the previous bit
value.

      If the bit stream is composed of a more complex data stream, an
extension of this idea would be the addition of a shift register to
store a longer history of the bit stream. It would then be possible
to, for instance, know that a certain number of bits in the past that
a certain pattern had been detected.  This could then be combined
with the current state to yield the ability to decode a very complex
pattern.

      The output of the state machine goes into a combinatorial
network.  There the bit stream is decoded and actual pattern
detection takes place.  Other inputs to the combinatorial network are
relevant machine information, such as the encoding used in the stream
(NRZ or NRZI encoding).

      An example would be the detection of an SDLC fla...