Browse Prior Art Database

Maintainable ROS Code Through the Combination of ROM And EEPROM

IP.com Disclosure Number: IPCOM000099629D
Original Publication Date: 1990-Feb-01
Included in the Prior Art Database: 2005-Mar-15
Document File: 4 page(s) / 131K

Publishing Venue

IBM

Related People

Batalden, GD: AUTHOR [+5]

Abstract

A processor is disclosed where most of the diagnostic and IPL code continues to reside in ROS while patches and updates reside in EEPROM.

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 52% of the total text.

Maintainable ROS Code Through the Combination of ROM And EEPROM

       A processor is disclosed where most of the diagnostic and
IPL code continues to reside in ROS while patches and updates reside
in EEPROM.

      Code normally in ROS is first examined for logical break points
where a new or changed function might be required.  At each of these
points, an indirect jump is inserted.  (An indirect jump goes to
where the jump-to location points.  Example:  Assume that location
100 contains 2304.  An indirect jump-to "address 100" would go not to
100, but to the address contained in location 100, or 2304.)  Also,
the addresses of commonly used subroutines are placed in the table.
Subroutines are then reached with an indirect call.  This approach
supports a high-level design concept while taking advantage of the
normal method for passing control.  Note then that all of these jumps
and calls are now indirect.  The "real" target addresses are listed
in a table.  The table is, in turn, identified by a pointer in a
register.  While the code continues to reside in ROS, the jump table
and some free area used for code updates is placed in the EEPROM.  (A
copy of this original jump table is also placed in the ROS for
backup--which will be explained in more detail later.)  It is this
technique which retains the advantages of ROS while adding the
flexibility of EEPROM.

      The processor begins execution with diagnostic code in the ROS.
 When one of the indirect jumps is encountered, the EEPROM is used to
find the target address.  If no additional code has been needed, or
no patches required, the jump returns back to the next instruction in
ROS (see Fig. 1).

      If, however, there is new or changed code, the address in the
EEPROM points to that updated code.  At the completion of the updated
code, execution returns to the ROS.  New or patched code is placed in
the free area of the EEPROM.  Because the EEPROM will retain its
contents even without power, once code is placed there, it will
remain-- much like the ROS code.  A picture of this logical flow with
patches in EEPROM follows (see Fig. 2).

      In a very similar way, the EEPROM can be used to patch or
update data areas.  Data values which might be subject to future
change can be located via pointers exactly like code sequences are
located via pointers.  If, in the future, there is a need to update
the data value, then the new value can be placed in...