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Modified Avp Format for I/O Tests

IP.com Disclosure Number: IPCOM000099641D
Original Publication Date: 1990-Feb-01
Included in the Prior Art Database: 2005-Mar-15
Document File: 2 page(s) / 83K

Publishing Venue

IBM

Related People

Mickelson, KB: AUTHOR [+2]

Abstract

Addressed is a format for the initialization and test of system memory, I/O registers, Bus Memory, Bus I/O space, in a way that is easily converted to the Architectural Verification Program (AVP) format defined for Processor testing, but also suited for I/O testing with a processor behavioral.

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 52% of the total text.

Modified Avp Format for I/O Tests

       Addressed is a format for the initialization and test of
system memory, I/O registers, Bus Memory, Bus I/O space, in a way
that is easily converted to the Architectural Verification Program
(AVP) format defined for Processor testing, but also suited for I/O
testing with a processor behavioral.

      The AVP format is a test format designed for use with a
simulation control program interfacing to a cycle simulator. The
format uses the following syntax to define each line:
      1.  H cards to identify the test,
      2.  I cards to define instructions,
      3.  D cards to initialize and test system memory,
      4.  R cards to set up and test architecture-defined
          registers, and
      5.  a RESULT and END card for control.
This allows for multiple test case files and the best definition for
executing instructions with known starting conditions.

      When trying to begin a systematic approach for testing the I/O,
the original AVP format is not broad enough.  It also places some
unnecessary restrictions on writing the tests.  This new MODIFIED
format helps overcome the deficiencies of the original AVP format.

      Included is a different way of initializing system memory with
data and instructions, plus a broadening of the concept associated
with register setup and test.  The figure on the next page shows the
expanded and modified format presented.  Using this method, I/O
simulation with a processor behavioral can be accomplished with great
ea...