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Bi-CMOS-Volt Tri-State Driver With 5-Volt Interface Capability

IP.com Disclosure Number: IPCOM000099681D
Original Publication Date: 1990-Feb-01
Included in the Prior Art Database: 2005-Mar-15
Document File: 2 page(s) / 66K

Publishing Venue

IBM

Related People

Boudon, G: AUTHOR [+3]

Abstract

An improved BI-CMOS off-chip driver circuit is described hereafter. The circuit shown on Fig. 1 is a TRI-STATE off-chip driver designed with submicron FETs and high frequency bipolar transistors. The power supply of this circuit cannot exceed the 3.3 V (or 3.4 V) defined for the future generation of integrated circuits and which verify the LVTTL (low voltage TTL) interface voltage levels. The mix of integrated circuits with 3.4 V and 5.0 V power supply is required in many applications. This tri-state circuit can be tied to a data bus which can be driven by traditional 5.0 V TTL circuits.

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Bi-CMOS-Volt Tri-State Driver With 5-Volt Interface Capability

       An improved BI-CMOS off-chip driver circuit is described
hereafter. The circuit shown on Fig. 1 is a TRI-STATE off-chip driver
designed with submicron FETs and high frequency bipolar transistors.
The power supply of this circuit cannot exceed the 3.3 V (or 3.4 V)
defined for the future generation of integrated circuits and which
verify the LVTTL (low voltage TTL) interface voltage levels. The mix
of integrated circuits with 3.4 V and 5.0 V power supply is required
in many applications. This tri-state circuit can be tied to a data
bus which can be driven by traditional 5.0 V TTL circuits.

      The circuit will be described in details with reference to the
figure. It uses a pair of output bipolar transistors T1 and T2
connected in push-pull mode to permit the driving of high load
capacitances as outside a chip. Operation is as follows:

      In the push-pull mode: the data signal and its complement are
provided to drive the bipolar transistors. Inverter P2, N2 drives the
upper bipolar transistor while transistors N6, N7, and N9 drive the
bottom transistor. When the INHIBIT signal is low, the driver is a
push-pull mode and transistors N1, P1, N5 and N8 are on while
transistors N3, N4, N10, N11 and N12 are off. The antisaturation of
transistor T1 is achieved with bipolar transistor T3 and NFETs N6 and
N7 connected as resistances. NFETs N5 and N8 are large enough to
avoid variation of the down...