Browse Prior Art Database

TPN-Controlled Reliability Stress System

IP.com Disclosure Number: IPCOM000099722D
Original Publication Date: 1990-Feb-01
Included in the Prior Art Database: 2005-Mar-15
Document File: 4 page(s) / 136K

Publishing Venue

IBM

Related People

Nadler, JN: AUTHOR [+4]

Abstract

A procedure has been developed for well-defined stress testing of typical part numbers (TPNs) of semiconductor devices. The in situmethod provides better understanding of the reliability fail mechanisms in the overall manufacturing process. The proposed system was developed for use during reliability qualification of bipolar gate arrays consisting of 2300 wireable 3-input NAND circuits.

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TPN-Controlled Reliability Stress System

       A procedure has been developed for well-defined stress
testing of typical part numbers (TPNs) of semiconductor devices.  The
in situmethod provides better understanding of the reliability fail
mechanisms in the overall manufacturing process.  The proposed system
was developed for use during reliability qualification of bipolar
gate arrays consisting of 2300 wireable 3-input NAND circuits.

      As part of a standard reliability qualification, an elevated
temperature stress test is performed on a logic part number designed
using the gate array masterslice. A user-designed part number is
often a functional subsystem of the user's system product and may not
always include many factors desirable in a reliability stress
vehicle.  These would include the ability to diagnose failure causes
and isolate failure locations, as well as complete coverage of the
product book set.  Additionally, the stress systems designed for the
user parts are often not representative of the user's application
conditions.  For instance, chip test paths are used to cause a
percentage of the internal circuits to switch randomly, but there is
essentially no way to monitor the chip outputs to determine if the
correct function is being performed by the chip.

      The inputs to the chip noted above are determined by the user
group or product design group using software simulation techniques.
The product assurance group, which normally doesn't have input to the
design of the part, uses very simple functions to design part
numbers.  One common method consists of multiple recirculating loops,
made by repeating the same basic NAND or inverter circuit which gives
very low coverage of the product book set.  Operation of this design
is not representative of the user's application conditions.

      The proposed TPN concept functions to avoid problems such as
those described.  The system contains two identical five instruction,
ten state microprocessors (Fig. 1).  The ten states are:
 RESET: GOTO RESET UNTIL RESET INACTIVE, ELSE GOTO FETCH
 A;
      FETCH A: ADDRBUS<=PC, IR<=DATABUS, GOTO FETCH B;
      FETCH B: GOTO SUB,STO,JMI,INA,OTA ON IR(0:2) =
      00x,01x,10x,110,
      111 (DECODE)
      SUB: ADDRBUS<=IR(2:9), ACC<=ACC-DATABUS, GOTO CONVERGE;
      STO: ADDRBUS<=IR(2:9), DATABUS<=ACC, GOTO CONVERGE;
      JMI: IF ACC(0) = 0 THEN NOP AND GOTO FETCH,
      ELSE:PC<=IR(2:9),
      IF PC = 255 GOTO HALT, ELSE: GOTO FETCH A;
      INA: ACC<=PORT, GOTO CONVERGE;
      OTA: PORT<=ACC, GOTO CONVERGE;
      CONVERGE: PC<=PC+1, GOTO FETCH A;
      HALT: GOTO HALT

      The electrical stress system is built around the microprocessor
(Fig. 2).  Peripheral devices needed to fully exercise the
instruction set with in situ -     monito...