Browse Prior Art Database

Improved Area Array Surface Mount Module Package

IP.com Disclosure Number: IPCOM000099736D
Original Publication Date: 1990-Feb-01
Included in the Prior Art Database: 2005-Mar-15
Document File: 2 page(s) / 55K

Publishing Venue

IBM

Related People

Koons, JP: AUTHOR

Abstract

Disclosed is an improved Surface Mount Area Array (SMA) module package. Pins are attached to the second-level package prior to making the pin-to-module connection. Closely spaced modules on both sides of a card are feasible.

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 91% of the total text.

Improved Area Array Surface Mount Module Package

       Disclosed is an improved Surface Mount Area Array (SMA)
module package.  Pins are attached to the second-level package prior
to making the pin-to-module connection. Closely spaced modules on
both sides of a card are feasible.

      Area array surface mount modules have density and performance
advantages over alternative designs.  This is because the number of
input/output pins can be greater for most designs than for perimeter
exit and because surface mounting preserves card area for module-to-
module wiring.

      On-chip performance has been continually improved, and package
delay has become the limiting factor for system performance.  Two
side area array attach is the densest possible packaging of modules,
but until now has been constrained by assembly, rework and
engineering change difficulty.

      In the disclosed package (see figure), Pins 1 are attached to
both sides of a Card 2 using either Pad Surface Solder 3 or Step Hole
Solder 4 prior to attaching Substrates 5.  Pin-to-card solder joints
can be inspected and repaired.

      Substrates 5 with Holes 6 at card Pins 1 locations are dropped
over card Pins 1.  Solder Connections 7 are made between Pin 1 tips
and Substrate 5 Lands 8 using a solder Ring 9.  Chips 10 have
previously been attached to Substrates 5 and protected with a Cap 11
and Seal 12 or encapsulated.

      Substrate Lands 8 are Connected 13 to Chip 10 inputs/out...