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Decoder Circuit With Improved Testability

IP.com Disclosure Number: IPCOM000099769D
Original Publication Date: 1990-Feb-01
Included in the Prior Art Database: 2005-Mar-15
Document File: 6 page(s) / 136K

Publishing Venue

IBM

Related People

Fields, DB: AUTHOR [+2]

Abstract

This article proposes the addition of circuitry to a decoder for semiconductor devices which will sense the row (address) lines so as to determine if one or more have been selected. This will work to improve the testability by detecting multi-selects and no-selects.

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 52% of the total text.

Decoder Circuit With Improved Testability

       This article proposes the addition of circuitry to a
decoder for semiconductor devices which will sense the row (address)
lines so as to determine if one or more have been selected.  This
will work to improve the testability by detecting multi-selects and
no-selects.

      In the development of semiconductors, as higher levels of
integration are being achieved, it is becoming increasingly difficult
to test circuits in the interior of a chip.  It is also desirable in
chip manufacture to eliminate routine AC chip testing, which is both
expensive and difficult.  This proposal is a positive adjunct to both
of these trends.  It consists of test circuitry T5, T6 and R6 added
to each decoder as well as the test buffer circuit (Figs. 1-4).  The
methodology advanced provides for testing of test circuitry as well
as the decoder.

      The decoder consists of an NOR circuit which drives the rowline
and a current switch test circuit (Fig. 1).  The NOR circuit performs
conventionally in selecting the rowline (+V) when all inputs IN1,
IN2, etc., are down (-V).  When one or more of the inputs are up
(+V), then the rowline is down (-V).

      The current switch test circuit, devices T5, T6 and R6 as
noted, is driven by the rowline and drives a large collector dot
circuit.  This collector dot consists of all decoder TEST OUT outputs
and the TEST BUFFER circuit output (Fig. 2).  The test circuitry was
added since it does better in testing the rowline voltages than does
the functional operation of the array.

      The cell (Fig. 5) senses the read rowline voltage by means of
current steering through the cell device T6. Hence, it senses the
voltage difference between rowlines, not the absolute rowline
voltage.  Only a small difference is necessary to select a cell.  A
cell, thus selected, is functional but has slow select time.  With
defects in the decoder such as T4 collector-emitter pipe, T4
emitter-base short, or rowline shorts, there will be abnormal rowline
voltages with the cell function at a slow rate.  The added test
circuitry will detect such abnormalities and send an error signal to
the chip boundary.

      Test circuitry functions as follows...