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Browse Prior Art Database

Redundant Branch Confirmation for Hedge Fetch Suppression

IP.com Disclosure Number: IPCOM000099820D
Original Publication Date: 1990-Feb-01
Included in the Prior Art Database: 2005-Mar-15
Document File: 1 page(s) / 23K

Publishing Venue

IBM

Related People

Emma, PG: AUTHOR [+7]

Abstract

A mechanism to improve the instruction fetching of a processor is described. The mechanism uses a Branch History Table (BHT) and a Decode History Table (DHT) to supply individual branch predictions. The BHT supplies the initial branch prediction, while the DHT is used to confirm the prediction. When both mechanisms agree that the branch is not taken, hedge fetching, the process of allocating an I-Buffer and fetching instruction on the non-guessed path, is suppressed. The additional I-Fetching opportunities thereby created address a performance deficit associated with Dynamic I-Buffer Empty. Whenever the joint prediction is incorrect, the Execution Unit, which detects the Branch Wrong Guess, must supply a restart signal and allocate a new I-Buffer.

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Redundant Branch Confirmation for Hedge Fetch Suppression

       A mechanism to improve the instruction fetching of a
processor is described.  The mechanism uses a Branch History Table
(BHT) and a Decode History Table (DHT) to supply individual branch
predictions.  The BHT supplies the initial branch prediction, while
the DHT is used to confirm the prediction.  When both mechanisms
agree that the branch is not taken, hedge fetching, the process of
allocating an I-Buffer and fetching instruction on the non-guessed
path, is suppressed.  The additional I-Fetching opportunities thereby
created address a performance deficit associated with Dynamic
I-Buffer Empty.  Whenever the joint prediction is incorrect, the
Execution Unit, which detects the Branch Wrong Guess, must supply a
restart signal and allocate a new I-Buffer.