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Fos Adjustment for High Resolution Color Monitor

IP.com Disclosure Number: IPCOM000099891D
Original Publication Date: 1990-Feb-01
Included in the Prior Art Database: 2005-Mar-15
Document File: 2 page(s) / 90K

Publishing Venue

IBM

Related People

Santitoro, RT: AUTHOR [+2]

Abstract

A high resolution color CRT monitor is unique in that it is designed for computer-controlled Front-Of-Screen (FOS) adjustments. The use of computer-controlled FOS adjustments greatly simplifies the manufacturing set-up process as well as field repair procedures.

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Fos Adjustment for High Resolution Color Monitor

       A high resolution color CRT monitor is unique in that it
is designed for computer-controlled Front-Of-Screen (FOS)
adjustments.  The use of computer-controlled FOS adjustments greatly
simplifies the manufacturing set-up process as well as field repair
procedures.

      Computer control of the FOS adjustments is accomplished via a
bidirectional multi-master bus that is an integral part of the
design.  The bus is the communications vehicle with which the various
FOS adjustments are preferred via D/A converters.  Once the display
is fully adjusted, the data for the D/A converters is stored in an
EEPROM.  As part of the display's power-on-reset (POR), these values
are retrieved by a micro-controller and loaded into their
corresponding D/A converters.

      The bus is a two-wire bidirectional multi-master bus used to
communicate between ICs.  It consists of a SDA (Serial DAta) line for
data transfer and a SCL (Serial CLock) line for data synchronization.
 The bus interconnects all the appropriate ICs in the monitor and is
also brought out of the box through the signal interface to connect
to the display terminal logic or an appropriate piece of test
equipment.

      The bus is used to communicate the stored FOS data from the
machine's memory to the various ICs that control the analog
circuitry.  The system consists of a micro-controller as the bus
controller, two compatible 6-bit octuple D/A converters for video
adjustments, compatible deflection processor for vertical deflection,
a horizontal deflection IC, a 1K-bit compatible EEPROM (to store FOS
set-up parameters), and associated interface circuitry.  T...