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Full-Swing Fully-Complementary MOS/Bipolar Logic Circuits

IP.com Disclosure Number: IPCOM000099925D
Original Publication Date: 1990-Mar-01
Included in the Prior Art Database: 2005-Mar-15
Document File: 3 page(s) / 99K

Publishing Venue

IBM

Related People

Shin, HJ: AUTHOR

Abstract

Two new, high-speed, full-swing logic circuits for fully-complementary MOS/bipolar technologies are disclosed. Both circuits implement logic in the CMOS circuitry, drive the outputs using BJTs (Bipolar Junction Transistors) in the push-pull emitter-follower mode, and achieve full swing through the MOSFET shunting networks between the base and emitter of each BJT. The new circuits also feature CMOS clamping diodes between the two base nodes of the emitter-follower to ensure that only one BJT is active at any time. Because essential techniques in the new circuits can be applied to any logic gate, only 2-input NAND gates are shown for description.

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Full-Swing Fully-Complementary MOS/Bipolar Logic Circuits

       Two new, high-speed, full-swing logic circuits for
fully-complementary MOS/bipolar technologies are disclosed. Both
circuits implement logic in the CMOS circuitry, drive the outputs
using BJTs (Bipolar Junction Transistors) in the push-pull
emitter-follower mode, and achieve full swing through the MOSFET
shunting networks between the base and emitter of each BJT.  The new
circuits also feature CMOS clamping diodes between the two base nodes
of the emitter-follower to ensure that only one BJT is active at any
time.  Because essential techniques in the new circuits can be
applied to any logic gate, only 2-input NAND gates are shown for
description.

      Fig. 1 shows the first new circuit where two MOSFETs (n-MOSFET
MN3 and p-MOSFET MP3) are used for the base-emitter shunting; the
gates of MN3 and MP3 are connected to VDD and VSS (= GND),
respectively.  The MN4-MP4 pair is the CMOS clamping diode that
consumes less area and adds less parasitic capacitance onto the nodes
X and Y than a BJT diode.

      In a state where both inputs (A and B) are '1', Y is fully
discharged to GND.  Thus, without MN3, the output node O would stay
at VBE, the base-emitter diode-drop.  However, due to MN3 which is
strongly ON, O is pulled to GND and QP1 is turned off.  X is held
by MN4 at the zero-back-bias threshold-voltage of MN4, VTn0, which
holds QN1 OFF.  Because MP3 and MP4 have a large substrate bias (=
VDD - VTn0), VTp  is greater than VTn0 from the body effect and MP3
and MP4 are OFF.

      If A falls to '0', MP2 sources a current that charges up X as
well as Y through MN4.  Because MP3 remains OFF until X reaches  VTp
, most of the current flows into the base of QN1 and is multiplied
into a large emitter current pulling O up. QP1 is firmly OFF because
the diode clamps Y, and MN3 is ON as long as O is lower than
VDD - VTn.

      When X rises above  VTp , MP3 becomes ON and bypasses a
fraction of the base current to the output.  MN3 will be OFF if both
O and Y get higher than VDD - VTn.  Finally, when X reaches VDD, the
threshold voltages of MP3 and MP4 return to VTp0 and MP3 pulls O up
to VDD.  MP4 now clamps...