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Four-Megabyte Single In-Line Memory Module Implementation Using One-Megabyte X Four-Bit Dynamic Rams

IP.com Disclosure Number: IPCOM000099930D
Original Publication Date: 1990-Mar-01
Included in the Prior Art Database: 2005-Mar-15
Document File: 5 page(s) / 187K

Publishing Venue

IBM

Related People

Alvarez, RD: AUTHOR [+2]

Abstract

This article describes a means to implement the use of four-megabyte single in-line memory modules in the current one-two-megabyte single in-line memory module slots in a personal computer (PC) system and maintain system compatibility.

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 52% of the total text.

Four-Megabyte Single In-Line Memory Module Implementation Using One-Megabyte X Four-Bit Dynamic Rams

       This article describes a means to implement the use of
four-megabyte single in-line memory modules in the current
one-two-megabyte single in-line memory module slots in a personal
computer (PC) system and maintain system compatibility.

      Memory currently used in some PC systems is configured in one-
or two-megabyte single in-line memory modules using 256K x four
dynamic RAM (DRAM) modules for memory storage and 256K x one modules
for parity storage or 256K x four in some of the cases.  These single
in-line memory modules are designed in such a way that allow for both
16- and 32-bit access of memory.  Currently, in the case of the
32-bit memory access onto a 32-bit bus the row address strobe (RAS)
for the upper and lower 16 bits of a one-megabyte bank are "DOT ORed"
on the planar.  This was done to restrict the use of the single
in-line memory module to one part number in 16- and 32-bit bus
systems.  Fig. 1 illustrates how the memory single in-line memory
modules are wired to the appropri ate RAS control lines.  It shows an
implementation of up to eight megabytes in four memory slots.  Each
RAS line controls 256K x 32 bits or one megabyte of memory.  Thus,
for support of eight megabytes of memory, there must be four memory
slots for four one-two-megabyte single in-line memory modules.

      The four-megabyte single in-line memory module (made of
one-megabyte x four-bit modules) configuration is different from the
one- two-megabyte module in that the four-megabyte single in-line
memory module uses one RAS to control four megabytes of memory and it
does not support the 16-bit access.

      In order to support both the currently used one-two- and the
proposed four megabyte single in-line memory module in the same
socket there can no longer be RASs "DOT ORed" outside the single
in-line memory module boundaries.  The memory socket must have four
RASs connected, one RAS drives a four-megabyte bank of memory in the
case of the four-megabyte single in-line memory module and two RASs
must drive a one-megabyte bank in the case of the one-two-megabyte
single in-line memory module due to the required ORing.

      Fig. 2 shows the new connections necessary for the one-two-mega
byte single in-line memory mo...