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Browse Prior Art Database

Error Signal for Fault Isolation

IP.com Disclosure Number: IPCOM000099991D
Original Publication Date: 1990-Mar-01
Included in the Prior Art Database: 2005-Mar-15
Document File: 3 page(s) / 66K

Publishing Venue

IBM

Related People

Bland, M: AUTHOR [+4]

Abstract

This article describes an error signal for fault isolation of components on a bus structure in a personal computer (PC) system.

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 82% of the total text.

Error Signal for Fault Isolation

       This article describes an error signal for fault
isolation of components on a bus structure in a personal computer
(PC) system.

      The major fail modes are illustrated in Fig. 1.  The effect of
these fail modes is the same, an inoperative PC. The disclosed
solution enables the determination of the location of this failure
down to a field replacement unit (FRU).

      Fig. 2 illustrates the buffer function used in most of the bus
functions.  It provides load isolation, latch-up protection, thermal
power sharing, better bus performance and finally short circuit
protection (if used with MS 700 buffers).  In all cases the buffer
provides a simple function such as inverting, non-inverting, latched
and integrated series resistor, all with or without tri-state.

      Disclosed herein is a simple algorithm that can be devised to
describe these simple buffer functions.  With these in mind a "test"
circuit can be developed to surround and help diagnose and isolate a
faulted FRU.  Fig. 3 illustrates an example of how this can be
implemented.  The key here is that additional circuity is minimal and
that this test circuit need not know the correct answers, only the
correct functions.  If the error output is sampled at a "valid" time,
then its sense would be an indication of the integrity of the bus.

      Fig. 4 illustrates the timing relationship.  If the error
function is sampled during a valid time, any error...