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Knowledge-Based Mechanism for High Level Abstraction of Low Level Digital Logic Design Models

IP.com Disclosure Number: IPCOM000100042D
Original Publication Date: 1990-Mar-01
Included in the Prior Art Database: 2005-Mar-15
Document File: 3 page(s) / 105K

Publishing Venue

IBM

Related People

Engleman, SP: AUTHOR [+5]

Abstract

Disclosed is a process that provides a mechanism for abstracting a higher level representation of a digital logic design from a low, functional level design. This task is done frequently and for various reasons during the process of designing digital logic systems, but it has usually required extensive manual effort. Some potential uses of such a mechanism include: 1. Recognition of logic design structures within specific contexts to aid in design analysis. 2. Reverse engineering of a low level logic design into a more understandable, maintainable, high level representation. 3. Validation of logic design against high level design guidelines. 4. Functional partitioning of logic design.

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Knowledge-Based Mechanism for High Level Abstraction of Low Level Digital Logic Design Models

       Disclosed is a process that provides a mechanism for
abstracting a higher level representation of a digital logic design
from a low, functional level design.  This task is done frequently
and for various reasons during the process of designing digital logic
systems, but it has usually required extensive manual effort.  Some
potential uses of such a mechanism include:
1.   Recognition of logic design structures within specific contexts
to aid in design analysis.
2.   Reverse engineering of a low level logic design into a more
understandable, maintainable, high level representation.
3.   Validation of logic design against high level design guidelines.
4.   Functional partitioning of logic design.

      The mechanism consists of two main parts: a "Knowledge Base" 10
of logic-abstraction rule statements, and an "Interpreter" 11 which
processes that Knowledge Base. Inputs required by this mechanism
include:
1.   A set of Knowledge Base rule statements created by people with
some familiarity with digital logic design concept and oriented
towards a specific type of analysis.
2.   A low-level representation of the logic design in the form of
programming structures (i.e., linked lists, arrays, etc.). This
"Logic Model" 12 contains information about the functional logic
blocks, their inputs and outputs, and their interconnections.

      As a result of processing the Knowledge Base 10 against the
Logic Model 12, the Interpreter 11 provides analysis results, such as
an indication as to whether or not the abstractions in the Knowledge
Base were successfully applied to the Logic Model.  A valid
abstraction implies that the logic is recognizable under the current
Knowledge Base.  A failure to abstract implies that either the logic
design is incorrect or the Knowledge Base is not comprehensive enough
to recognize that configuration.

      The Knowledge Base consists of a set of language statements of
the form:
  Predicate(Vars) = Expression where "Predicate" is the name given to
a particular abstraction.
  Vars    := Pingroups:Pingroups           (Inputs,Outputs)
 := Pingroups:Pingroups/Parameter (Inputs,Outputs,Parameter)
:= Pingroups/Parameter           (Input or Outputs,Para meter) :=
Parameter                     (Parameter only) Pingroups
:=P...