Browse Prior Art Database

Opcode Remap And Compression in Hard Wired RISC Microprocessor

IP.com Disclosure Number: IPCOM000100057D
Original Publication Date: 1990-Mar-01
Included in the Prior Art Database: 2005-Mar-15
Document File: 1 page(s) / 44K

Publishing Venue

IBM

Related People

Kahle, JA: AUTHOR

Abstract

This article describes a way to save decode logic in a RISC microprocessor. The invention also makes the decode logic faster because there is less logic in the decode path.

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 74% of the total text.

Opcode Remap And Compression in Hard Wired RISC Microprocessor

       This article describes a way to save decode logic in a
RISC microprocessor.  The invention also makes the decode logic
faster because there is less logic in the decode path.

      A RISC architecture can describe an instruction format with two
opcode fields.  The first primary opcode field is six bits wide.
Several encodings of the primary opcode are 'escape' opcodes to the
extended opcode field.  The extended opcode field is ten bits wide.
This article describes how the 16 bits of the opcode are remapped to
a ten-bit opcode field.

      Basically, there are three types of instructions in the primary
opcode field:  Arithmetic and Compare, Logical and Load/Stores of
Fixed/Floating General Purpose Registers (GPRs).  These instructions
have immediate fields which occupy the extended opcode field.  The
remapping takes these primary opcodes and maps them into the extended
ten-bit field.  The remapping will take the Arithmetic and Compare
instructions and map them with the Arithmetic and Compare
instructions that are located in the extended opcode space. The same
remapping applies to the Logic instructions.  The Load and Store
instructions are actually mapped over the corresponding Load and
Stores of the extended opcode area. This reduces the number of
instructions that need to be decoded.

      The figure illustrates the remap algorithm.  The ten-bit
extended opcodes are mapped dir...