Browse Prior Art Database

Two-Step Plating for High Lead-Count Tab Product

IP.com Disclosure Number: IPCOM000100063D
Original Publication Date: 1990-Mar-01
Included in the Prior Art Database: 2005-Mar-15
Document File: 2 page(s) / 64K

Publishing Venue

IBM

Related People

Atkinson, JM: AUTHOR [+2]

Abstract

Disclosed is a two-step plating process for producing tape automatic bonding (TAB) product satisfying the opposing needs of the inner-lead bond (chip joining) and the outer-lead bond (card joining) processes. The proposed process uses a novel sequence of existing processes to produce fine-line circuitry, high lead-count TAB packages which otherwise would require substantial tape build process development and/or bonding tool modification.

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Two-Step Plating for High Lead-Count Tab Product

       Disclosed is a two-step plating process for producing
tape automatic bonding (TAB) product satisfying the opposing needs of
the inner-lead bond (chip joining) and the outer-lead bond (card
joining) processes.  The proposed process uses a novel sequence of
existing processes to produce fine-line circuitry, high lead-count
TAB packages which otherwise would require substantial tape build
process development and/or bonding tool modification.

      The trend for increasing lead count and decreasing chip size is
driving fine dimension circuitry.  However, the present limits on the
photolithography process for pattern plating (or the subtractive etch
process for additive/semi-additive plating) are /= 0.002 inch lines
and /= 0.002 inch spaces.  With the present circuitization process,
these limits can only be overcome if the circuit thickness is lowered
substantially below the engineering specification of 0.0014 inches
such that a thinner photoresist can be used (or less copper is etched
in the case of subtractive processing).  In opposition to this,
thinner circuitry would render the present outer-lead excise and
reform tool obsolete as the practical lower lead thickness limit for
this tool is 0.0014 inch.  The proposed process sequence enables
fine-line circuit dimensions to be achieved while maintaining the
outer-lead thickness required by excise/reform tooling.  No
significant circuitization process development is warranted by
application of this process flow...