Browse Prior Art Database

I/O Load/Store Speedup for Pipelined Processors

IP.com Disclosure Number: IPCOM000100185D
Original Publication Date: 1990-Mar-01
Included in the Prior Art Database: 2005-Mar-15
Document File: 1 page(s) / 41K

Publishing Venue

IBM

Related People

Peterson, MJ: AUTHOR

Abstract

Disclosed is a method of speeding pipelined processor throughput by decreasing the overhead associated with Input/Output (I/O) commands. The I/O subsystem is allowed to participate in the pipelined processor operation.

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 77% of the total text.

I/O Load/Store Speedup for Pipelined Processors

       Disclosed is a method of speeding pipelined processor
throughput by decreasing the overhead associated with Input/Output
(I/O) commands.  The I/O subsystem is allowed to participate in the
pipelined processor operation.

      High speed processor units often have to wait on loads and
stores to complete to Input/Output devices.  Since these devices are
typically much lower than the processor, this can be a significant
performance penalty.

      A typical pipelined processor has an instruction control
subsystem (ICS) that feeds instructions to the ALU and other parts of
the processor.  The ICS can inform the I/O subsystem of future loads
and stores to the I/O address space.  The ICS would also inform the
I/O unit of whether or not the instruction was actually executed
(later in time).

      Some I/O devices support non-destructive reads.  Any load to
these devices would take place as soon as possible. The data could be
synced to the processor clock and waiting in storage local to the
processor for the actual execution of the load.  (The data would be
purged if the load never executed.)

      Other I/O devices do not support non-destructive reads so the
actual read must be held until the execution of the load instruction
is verified.  This is also true of all stores to I/O space - no store
should take place until the actual instruction executes.

      Even in these cases, the I/O contro...