Dismiss
InnovationQ will be updated on Sunday, Oct. 22, from 10am ET - noon. You may experience brief service interruptions during that time.
Browse Prior Art Database

Application of Precision Solder Volumes to Surface Pads

IP.com Disclosure Number: IPCOM000100327D
Original Publication Date: 1990-Apr-01
Included in the Prior Art Database: 2005-Mar-15
Document File: 2 page(s) / 62K

Publishing Venue

IBM

Related People

Boll, SE: AUTHOR [+2]

Abstract

Disclosed is a technique to apply precision solder volumes to the surface pads 2 of printed wiring boards 1 for applications where controlled solder volume affects the soldering process yield of electronic device attachment at the next higher assembly level.

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 100% of the total text.

Application of Precision Solder Volumes to Surface Pads

       Disclosed is a technique to apply precision solder
volumes to the surface pads 2 of printed wiring boards 1 for
applications where controlled solder volume affects the soldering
process yield of electronic device attachment at the next higher
assembly level.

      Tooling pins 3 are assembled to assigned holes in the printed
wiring board and the surface pads 2 are fluxed. Polyimide spacer
layers 4 and solder preform location layer 5 are assembled to the
surface of the printed wiring board 1 located by tooling holes 8 in
the layers.  Spherical solder preforms are applied to the top of
preform location layer 5 which has a series of holes 10 that
correspond to the surface pad pattern 2 and that accept only a single
preform. Polyimide cover layer 6 and weight 7 are assembled over
preform location layer 5.  Cover layer 6 prevents solder preform loss
from flux boiling.  Weight 7 maintains the flatness of spacer layers
4, preform location layer 5 and cover layer 6 during reflow.  The
solder preforms are then reflowed by vapor phase soldering.  The slot
patterns in spacer layers 4 permit the solder to assume an
unrestricted configuration controlled by surface geometry of the
solder pads 2.