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Browse Prior Art Database

System Adapter Path Selection

IP.com Disclosure Number: IPCOM000100387D
Original Publication Date: 1990-Apr-01
Included in the Prior Art Database: 2005-Mar-15
Document File: 2 page(s) / 62K

Publishing Venue

IBM

Related People

Azevedo, MJ: AUTHOR [+3]

Abstract

In a device controller, the System Adapter (SA) serves as a communication link between the control units and the central processor. The System Adapter communicates all sequence and protocol information between the channel interface and the microprocessor of the controller. Four or eight channel interfaces are connected to one or two Storage Paths (SPs). A plurality of SAs are multiplexed into either one or two SPs. The selection of the SP is based on the channel address selection and whether a single control unit mode or a dual control unit mode is selected. All eight SAs use a common set of register addresses.

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 65% of the total text.

System Adapter Path Selection

       In a device controller, the System Adapter (SA) serves as
a communication link between the control units and the central
processor.  The System Adapter communicates all sequence and protocol
information between the channel interface and the microprocessor of
the controller.  Four or eight channel interfaces are connected to
one or two Storage Paths (SPs). A plurality of SAs are multiplexed
into either one or two SPs.  The selection of the SP is based on the
channel address selection and whether a single control unit mode or a
dual control unit mode is selected.  All eight SAs use a common set
of register addresses.

      As shown in the figure, a plurality of System Adapters, SA A-SA
H, interconnect the channels from the central processors through two
Storage Paths, SP0 and SP1, to the direct access storage devices
(DASDs).  Only one SA can be selected to one SP.  Each SP can be
selected to a different SA at the same time.  The connections can be
made through the path switches.

      The SAs are multiplexed into two storage paths.  Each SA has
its own sequence control logic and its own connection to an SP.  Each
SA is selectively connected to SP0 and SP1 through a two-port switch.
 One switch port is assigned to each storage path.  All of the SAs
are connected to a storage path through its path port connection.

      Path selection is completed by a path switch, one for each
storage path.  The control of t...