Browse Prior Art Database

Monolithic Terminating Resistor

IP.com Disclosure Number: IPCOM000100457D
Original Publication Date: 1990-Apr-01
Included in the Prior Art Database: 2005-Mar-15
Document File: 2 page(s) / 59K

Publishing Venue

IBM

Related People

Almquist, FA: AUTHOR [+3]

Abstract

Disclosed is a chip-size Tape Automated Bonding (TAB)-mountable terminating resistor network for high density memory applications.

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 97% of the total text.

Monolithic Terminating Resistor

       Disclosed is a chip-size Tape Automated Bonding
(TAB)-mountable terminating resistor network for high density memory
applications.

      Standard subtractive printed circuit board fabrication
techniques are employed to produce terminating resistors on
OHMEGA-PLY* Resistor- Conductor epoxy glass laminates.  Following
circuitization processes of the resistors and conductors, solder pads
are created via a number of different processes (i.e., tin/lead
plating or reflowed, screened solder paste).  The individual
chip-size resistor networks are then excised from the circuit board
to form the individual resistor chip.

      The resistor chip is then joined to a TAB package by reflowing
the solder pads.  Once the resistor chip is joined to the TAB
package, all follow-on assembly packaging processes are equivalent to
those used for the memory chip TAB packages.

      In this embodiment, as many as 44 resistors are constructed in
a 9 mm x 14 mm area.  The individual resistors on a chip are arranged
in a network appropriate for the lines being terminated.  In this
case, all resistors are commoned to one bus (see the figure).

      The resistor chip size may be adjusted to meet application TAB
and resistor count requirements, while the individual resistor size
may be altered to meet power dissipation and tolerance requirements.
In the embodiment shown, resistors in the 5-10% tolerance range are
easily produced.
*  Tr...