Browse Prior Art Database

Equalization of Memory Sense Amplifier Nodes to Improve Performance

IP.com Disclosure Number: IPCOM000100574D
Original Publication Date: 1990-May-01
Included in the Prior Art Database: 2005-Mar-15
Document File: 2 page(s) / 57K

Publishing Venue

IBM

Related People

Maffitt, TM: AUTHOR

Abstract

High density/performance static random access memories (SRAMs) require a data path architecture which offers rapid data propagation and high noise immunity. Sense amplifiers (SAs) are sensitive to process and AC noise mismatches. In a conventional fully differential SA operation, noise is amplified by the SAs until the "real" signal magnitude exceeds the noise, causing the correct data to be amplified and propagated through the data path. The correction process delays the signal propagation, resulting in increased chip access. The utilization of a fully differential architecture allows the data path to reject and recover from SA mismatches due to process and transient noises. (Use of a two-stage primary SA improves performance.

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Equalization of Memory Sense Amplifier Nodes to Improve Performance

       High density/performance static random access memories
(SRAMs) require a data path architecture which offers rapid data
propagation and high noise immunity. Sense amplifiers (SAs) are
sensitive to process and AC noise mismatches. In a conventional fully
differential SA operation, noise is amplified by the SAs until the
"real" signal magnitude exceeds the noise, causing the correct data
to be amplified and propagated through the data path. The correction
process delays the signal propagation, resulting in increased chip
access. The utilization of a fully differential architecture allows
the data path to reject and recover from SA mismatches due to process
and transient noises. (Use of a two-stage primary SA improves
performance.) The second SA is enabled after the first SA has
developed approximately 100 mv of signal on the quadrant I/O line
(QIOT/QIOC). This helps reject noise prior to the second SA, by
withholding signal propagation until the first SA has an opportunity
to recover from noise mismatches.

      By incorporating shunt devices, as shown in the figure, in both
stages of a two-stage primary differential sense amplifier and a
similar shunt design in the single-stage second sense amplifier (not
shown), restoring related noise mismatches at the beginning of a
cycle are prevented. The pass devices will equalize the internal
nodes of the differential SAs and therefore improve perform...