Browse Prior Art Database

Direct Memory Access Controller Emulation

IP.com Disclosure Number: IPCOM000100799D
Original Publication Date: 1990-Jun-01
Included in the Prior Art Database: 2005-Mar-16
Document File: 2 page(s) / 81K

Publishing Venue

IBM

Related People

Heath, CA: AUTHOR

Abstract

A technique is described whereby a computer processor, as used in personal computer systems, can have the ability to emulate the functions of direct memory access (DMA) controllers. Two concepts are described: one with processors equipped with "trapping" instructions within the processor to program DMA hardware, and the other for processors equipped without a trapping function. The concept removes the necessity for a system to have a separate DMA controller to move data.

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 52% of the total text.

Direct Memory Access Controller Emulation

       A technique is described whereby a computer processor, as
used in personal computer systems, can have the ability to emulate
the functions of direct memory access (DMA) controllers.  Two
concepts are described: one with processors equipped with "trapping"
instructions within the processor to program DMA hardware, and the
other for processors equipped without a trapping function.  The
concept removes the necessity for a system to have a separate DMA
controller to move data.

      Typically, personal computer system attachments depend on the
processor to cause a data transfer, or they may use a DMA controller
to move blocks of data (or a byte) between DMA slaves and storage.
The DMA slaves are selected by a unique protocol that is generated by
the DMA controller and is often centralized in the personal computer
system to augment the processor.

      Processors, such as the Intel 80386, contain functions that
allow "trapping" of setup instructions to a DMA controller through
the use of "string move" operations.  The block diagram of Fig. 1
illustrates the concept for processors equipped with the "trap and
emulate" (T & E) function.  The processor detects the control address
access of a program, driver or BIOS to the DMA control registers. The
control information, the start address, the transfer length, the
transfer width, etc., are intercepted by the T & E function within
the processor and stored in RAM. Selection of the DMA channel is
decoded on the bus and causes an interrupt to the processor.  The
interrupt routine uses the control information in RAM to initiate a
"string...